Abstract
Foisal Ahmed, Md. Fokhrul Islam
This research work proposes a low power Finite Impulse Response (FIR) digital filter system using Field Programmable Gate Array (FPGA) to filter biomedical signals. A major issue regarding such implementations is associated with computational complexity that may hinder its practical application. Several researches that aim to overcome this problem have been found by using various designs like booth multiplier, distributive arithmetic design, reduce adder graph (RAG), common sub-expression elimination method etc. This work has achieved the target of power line frequency of 50Hz noise cancellation. It is shown that the proposed design using RAG can give faster speed and require less hardware resources than that for the Direct Structure-I design. The performance of the proposed method is also compared with several existing research works to study its efficacy and it is shown that proposed design can achieve nearly 2% area delay product and 43% less power consumptions in implementation of a FIR low-pass filter. The designed filter is also tested on ECG waves as example of biomedical signal from samples of the MIT-BIH Arrhythmia database corrupted with power frequency noise. The entire system has been implemented on the ALTERA DE-II FPGA education board by synthesizing Verilog HDL using Quartus II tool.
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